SD card

The GECKO5Education provides a SD-card slot that is connected to a SD-card reader (hence you can access the SD-card directly from your computer). It is also possible to access the SD-card from the FPGA. To be able to access the SD-card from the FPGA, the SD-card controller needs to be put in reset, and hence the SD-card is not any more accessible from your computer.

Using the SD-card

In this section you find a VHDL and Verilog top-level and the corresponding lpf-file that you can use for the SD-card.

Important

Although VHDL is case-insensitive, the lpf-file is not. Meaning that the port-names in the top-level entity need to be copied exactly in the lpf-file.

An example for a VHDL top-level entity is shown below:

library ieee;
use ieee.std_logic_1164.all;

entity toplevel is
  port ( sdNDet   : in    std_logic;
         sdData   : inout std_logic_vector(3 downto 0);
         sdClock  : out   std_logic;
         sdCmd    : out   std_logic;
         sdcReset : out   std_logic;
         ... );
end toplevel;

An example for a Verilog top-level is shown below:

module toplevel (
  output wire      sdClock,
                   sdCmd,
                   sdcReset,
  input wire       sdNDet,
  inout wire [3:0] sdData,
  ...);
  ...
endmodule

The required entries in the lpf-file are:

LOCATE COMP "sdNDet" SITE "A2";
LOCATE COMP "sdData[0]" SITE "B5";
LOCATE COMP "sdData[1]" SITE "A5";
LOCATE COMP "sdData[2]" SITE "B3";
LOCATE COMP "sdData[3]" SITE "A3";
LOCATE COMP "sdClock" SITE "A4";
LOCATE COMP "sdCmd" SITE "B4";
LOCATE COMP "sdcReset" SITE "H3";
IOBUF PORT "sdNDet" PULLMODE=NONE IO_TYPE=LVCMOS33;
IOBUF PORT "sdData[0]" PULLMODE=NONE IO_TYPE=LVCMOS33;
IOBUF PORT "sdData[1]" PULLMODE=NONE IO_TYPE=LVCMOS33;
IOBUF PORT "sdData[2]" PULLMODE=NONE IO_TYPE=LVCMOS33;
IOBUF PORT "sdData[3]" PULLMODE=NONE IO_TYPE=LVCMOS33;
IOBUF PORT "sdClock" PULLMODE=NONE IO_TYPE=LVCMOS33;
IOBUF PORT "sdCmd" PULLMODE=NONE IO_TYPE=LVCMOS33;
IOBUF PORT "sdcReset" PULLMODE=NONE IO_TYPE=LVCMOS33;

Important

1. Note the case-sensitivity of the lpf-file.

2. The tools require exactly one lpf-file, hence all assignments you use need to be in a single lpf-file.

Note

The signal sdcReset is used to select how the SD-card is connected. Putting a logic 0 will connect the SD-card to the SD-card reader. Putting a logic 1 on this signal will connect the SD-card to the FPGA.

Summary

Below the table with all required information for the SD-card:

Name:	FPGA pin:	IO_TYPE:	Active low/high	Description:
card detection	A2	LVCMOS33	active low	when logic 0 there is a card present
data bit 0	B5	LVCMOS33	active high	data bit 0
data bit 1	A5	LVCMOS33	active high	data bit 1
data bit 2	B3	LVCMOS33	active high	data bit 2
data bit 3	A3	LVCMOS33	active high	data bit 3
clock	A4	LVCMOS33	active high	data clock
command	B4	LVCMOS33	active high	command line
usage select	H3	LVCMOS33	active high	a logic 1 connects the card to the FPGA