SPI-flash

The GECKO5Education/Modular have a 32Mbit ultra low power SPI flash. The data sheet can be found here. The flash is operated at 1.8V to reduce the overall energy consumption.

Using the SPI-flash

In this section you find a VHDL and Verilog top-level and the corresponding lpf-file that you can use for the SPI-flash.

Important

Although VHDL is case-insensitive, the lpf-file is not. Meaning that the port-names in the top-level entity need to be copied exactly in the lpf-file.

An example for a VHDL top-level entity is shown below:

library ieee;
use ieee.std_logic_1164.all;

entity toplevel is
  port ( spiClk   : out   std_logic;
         spiNCs   : out   std_logic;
         spiSiIo0 : inout std_logic;
         spiSoIo1 : inout std_logic;
         spiIo2   : inout std_logic;
         spiIo3   : inout std_logic;
         ... );
end toplevel;

An example for a Verilog top-level is shown below:

module toplevel (
  output wire spiClk,
              spiNCs,
  inout  wire spiSiIo0,
              spiSoIo1,
              spiIo2,
              spiIo3,
  ...);
  ...
endmodule

The required entries in the lpf-file are:

LOCATE COMP "spiClk" SITE "L20";
LOCATE COMP "spiNCs" SITE "M20";
LOCATE COMP "spiSiIo0" SITE "K20";
LOCATE COMP "spiSoIo1" SITE "M19";
LOCATE COMP "spiIo2" SITE "L19";
LOCATE COMP "spiIo3" SITE "N19";
IOBUF PORT "spiClk" IO_TYPE=LVCMOS18;
IOBUF PORT "spiNCs" IO_TYPE=LVCMOS18;
IOBUF PORT "spiSiIo0" PULLMODE=UP IO_TYPE=LVCMOS18;
IOBUF PORT "spiSoIo1" PULLMODE=UP IO_TYPE=LVCMOS18;
IOBUF PORT "spiIo2" PULLMODE=UP IO_TYPE=LVCMOS18;
IOBUF PORT "spiIo3" PULLMODE=UP IO_TYPE=LVCMOS18;

Important

Note the case-sensitivity of the lpf-file.
The tools require exactly one lpf-file, hence all assignments you use need to be in a single lpf-file.

Summary

Below the table with all required information for the uart-interface:

Name:	FPGA pin:	IO_TYPE:	Active low/high	Description:
clock	L20	LVCMOS18	active high	serial clock
chip select	M20	LVCMOS18	active low	chip select
si/IO0	K20	LVCMOS18	active high	serial in/ data bit 0
so/IO1	M19	LVCMOS18	active high	serial out/ data bit 1
wp/IO2	L19	LVCMOS18	wp(low) IO2(high)	write protect/ data bit 2
rst/IO3	N19	LVCMOS18	reset(low) IO3(high)	reset/ data bit 3