Real Time Clock (RTC)

The GECKO5Education/Modular provides a Real Time Clock (RTC). The RTC provided is a DS1338Z. The data sheets can be found here.

The RTC is connected to the \(\text{I}^2\text{C}\)-interface (see also the Camera interface). For reading the slave-address is 0xD1 and for writing the slave-address is 0xD0.

Using the real-time-clock

In this section you find a VHDL and Verilog top-level and the corresponding lpf-file that you can use for the camera interface.

Note

Make sure that in case you also use the camera-interface you only define the \(\text{I}^2\text{C}\)-interface once!

Important

Although VHDL is case-insensitive, the lpf-file is not. Meaning that the port-names in the top-level entity need to be copied exactly in the lpf-file.

An example for a VHDL top-level entity is shown below:

library ieee;
use ieee.std_logic_1164.all;

entity toplevel is
  port ( scl        : out   std_logic;
         sda        : inout std_logic;
         mfp        : in    std_logic;
         ...);
end toplevel;

An example for a Verilog top-level is shown below:

module toplevel (
  output wire      scl,
  inout  wire      sda,
  input  wire      mfp,
  ...);
  ...
endmodule

The required entries in the lpf-file are:

LOCATE COMP "scl" SITE "P3";
LOCATE COMP "sda" SITE "K2";
LOCATE COMP "mfp" SITE "C14";
IOBUF PORT "scl" PULLMODE=UP IO_TYPE=LVCMOS33;
IOBUF PORT "sda" PULLMODE=UP IO_TYPE=LVCMOS33;
IOBUF PORT "mfp" PULLMODE=NONE IO_TYPE=LVCMOS33;

Important

  1. Note the case-sensitivity of the lpf-file.

  2. The tools require exactly one lpf-file, hence all assignments you use need to be in a single lpf-file.

Note

The \(\text{I}^2\text{C}\)-interface is an open-collector/drain interface, hence a logic 0 is forced, and a logic 1 is realized with a pull-up.

Summary

Below a table with all required information for the \(\text{I}^2\text{C}\)-interface, shared between the Real-Time-Clock (RTC) and camera-interface:

Name :

FPGA pin:

IO_TYPE:

Pull-up/down:

SCL

P3

LVCMOS33

UP

SDA

K2

LVCMOS33

UP

Below the table with all required information for the multi-function pin of the RTC:

Name :

FPGA pin:

IO_TYPE:

Pull-up/down:

mfp

C14

LVCMOS33

NONE